Name		ISA bus with 65816, GAL #2;
	Device		G16V8AS;
	Designer	Ruud Baltissen;
	Date		2013-04-16;
	Revision	V0.1;

	Assembly	--;
	Company 	--;
	Location	--;
	Partno 		--;

    
/* Define Logic Operators */
	/* AND = &  */
	/* OR  = #  */
	/* NOT = !  */     


/* Define Input Pins */
pin  1 = GALCLK;	/* clock input */
pin  2 = A12;
pin  3 = A13; 
pin  4 = A14; 
pin  5 = MEM16;		/* 16-birs memory operation going on */
pin  6 = IO16;		/* 16-birs I/O operation going on */
pin  7 = PHI0;		/* new PHI0 for 65816, including WAIT states */
pin  8 = RW; 		/* R/W coming from 65816 */
pin  9 = EIO;		/* I/O signal coming from GAL #1 */
pin 11 = GALOE;		/* OE input */

/* Define Output Pins */
pin 19 = i8259;		/* Intel 8259 chip select signal (L) */
pin 18 = RD168;		/* RD signal: IDE buffer -> Commodore (L) (L) */
pin 17 = RD16;		/* RD signal: card -> IDE buffer (H) */
pin 16 = WR16;		/* WR signal: IDE buffer -> card (L) */
pin 15 = WR816;		/* WR signal: Commodore -> IDE buffer (H) */
pin 14 = FUT1;		/* future purposes */
pin 13 = FUT2;		/* future purposes */
pin 12 = CIA;		/* 6526, if used on C64 */

/* Boolean Equations */
RD16  =  PHI0 & RW & !(MEM16 & IO16);
WR16  = !PHI0 # RW #  (MEM16 & IO16);
I8259 =   EIO #  A14 #  A13 #  A12;
RD168 =   EIO #  A14 #  A13 # !A12 # !RW;
WR168 = !(EIO #  A14 #  A13 # !A12 #  RW);
FUT1  =   EIO #  A14 # !A13 #  A12;
FUT2  =   EIO #  A14 # !A13 # !A12;
CIA   =   EIO # !A14 #  A13 #  A12;