EVM7000-3
What is it?
From the user manual: "The RTC/EVM7000 is a TMS7000 Evaluation Module, referred to throughout this manual as the "EVM". It is designed to emulate the Single-Chip mode of the TMS7000 NMOS and CMOS families. It provides all the signals that would be available from masked ROM parts including the UART functions. The EVM provides the ability to develop, debug, and test programs prior to factory masking.".In other words: you connect a design with a TMS7000 CPU in Single-Chip mode to the EVM7000 by replacing the original processor with a connector coming from the EVM7000. As extra explanation: Single-Chip mode means there is only this TMS processor on the board, no extra RAM, ROM or peripherals that need control of an address and data bus. Things like relais, LEDs, inputs from other devices, etc. are allowed.
The EVM7000 is quite a universal board that can be equipped with any of the known TMS7000 processors. The idea is to equip the board with the processor that is to be used on the board to be tested. It has to be the same processor because there are small differences in hardware and the addresses of the various registers. But that shouldn't be difficult because the book already mentions it: simply use the TMS7000 from your project as it has to be replaced by the test connector anyway. It even can be an already programmed one because the internal ROM wo'nt be addressed anyway. But a picture tells more than a thousand words:
FYI: AFAIK there is no information available about the EVM7000 itself on internet, just the user manual mentioned above on the site of Fred Jan Kraan and, of course, from now on this page.
State: Schematics, board and PCB.
Background
Jaak Bartok, Jaaks Electronics & vintage Workplace(s),and Fred Jan Kraan, Oh no, not another computer museum! are working on some projects that involve several variants of the TMS7000. For this reason I decide to create a TMS7000 version of my Eurocom project: the EurocomTMS7000. Jaak uses the EVM7000 to develop and debug his TMS7000 projects. But he has only one of them and so he mentioned if it was possible to convert it into an EVM7000 equivalent. So I started designing.The EVM7000 has various ROM ICs, RAM ICs and I/O onboard. The onboard TMS CPU runs in "Processor mode" which means that some (parts) of the ports are used as data, address and control lines. To be able to let the EVM7000 to emulate the original TMS CPU, these ports have to be emulated in one or another way and that is done by a part of the I/O. In this case we have to emulate port C and D and bits 4..7 of port B. Port A is provided by the CPU itself.
In this mode the processor also starts up reading from an external ROM instead of its own internal one.
A part of the onboard I/O is also used to provide a serial interface and an onboard EPROMmer. The address range for this hardware is outside the range normally reserved for internal addresses, $0000 - $01FF. This cannot cause problems because the board under test should have no extra RAM or ROM and so there cannot be a conflict.
The first ideas
First you have to know there are two versions of the EVM7000: the EVM7000N for the older NMOS processors and the EVM7000C for the newer CMOS processors. The engineers in those days had their reasons use different ICs for the two versions. The N-version uses a MOS 6532, the C-version the NSC810. These ICs handle port C and D.But now the weird thing. Mapping these addresses on the 6532 was no problem, same order for the data registers and the data direction registers. But the order is different for the NSC810. With a normal IC with separate address and data lines, like the 6532, that would not have been a problem, just swap some address lines and invert them when needed. But the NSC810 has a multiplexed data/address bus and swapping and/or inverting lines would not work because it would have effect on the data as well. They solved this problem by creating a separate multiplexed bus for the NSC810. But what made me really wonder, they also created two 8-bit registers for port C and D, parallel to the original ones.
A side remark: both ICs have memory onboard but it is not used.
The EVM7000 has an onboard EPROM programmer. The address range for handling this device lays outside the range for the internal registers of any known TMS7000 CPU. Having already various programmers, I didn't see any reason to provide this feature in this particular design in the first place.
Then the serial interface: it is bit-banged. If you have no idea what this means, the CPU sets and resets the bit on the outgoing line all by itself and does the same for reading bits on the incoming line. The address range for managing the serial interface also lays outside the range for the internal registers. So the idea rose to use a real UART like a Motorola 6850 or National Semiconductor 8250.
The final idea
I had a long but good discussion with Fred Jan en Jaak which resulted in version 3 in the end. But this discussion revealed one very important fact: there is no commented source of the firmware available. This means that any deviation from the original hardware means that the firmware has to be changed, something that is not possible in a reasonable short time. So this meant I had to stick to a 100% compatible design for now. But this didn't mean I had to skip certain innovations. So here are the results:- Just one (EP)ROM instead of the three smaller 8 KB ones. A 27256 32 KB EPROM should be able to cover what we want. OK, the designs says 27256 but in reality I often use the 27SF256 and 27SF512 EEPROM: no UV needed to erase them and much faster to program than the original EPROMs.
- Just one RAM: a 128 KB SRAM will provide the needed SRAM from 0200h to 0FE00 if needed. Why 128 KB? Then I only need one IC, a 681000 or equivalent. Otherwise I would need two 32 KB ones.
- I will use a 6522 to cover the pins for port C and D. If there is really a need for the CMOS version, there is also the 65C22 available.
- A 74LS175 and 47LS243 will generate/read the bits 4..7 of port B of processor under test, just like the original design.
- I will use the original bit-banged serial interface but without the +/-12 Volt 1488/1489 RS232 interface. Main reason: we can use USB-RS232 TTL interfaceces. I provide the original four signals, TxD, RxD, DSR and DTR plus Ground and +5V using a 6-pin header. In the worst case one can connect modules with, for example, MAX232 converters.
- A GAL, type 20V8, will decode the ranges for the RAM, ROM and I/O. It will also generate the various signals needed for the I/O like:
- PHI2 / E for the 6522 by inverting the ENABLE signal coming from the TMS CPU.
- /LA for the 6522 as well, see later.
- An enable signal for the second 22V10 GAL that will cover the I/O range 0000h - 01FFh.
This second GAL generates: - The read signal for the 74LS243 and write signal for the 74LS175 for the address 0106h.
- The select signals for the serial interface for the address 01F7h.
- The select signal for the 6522 in the range 0108h - 010Bh.
- An extra select signal for the 6522 somewhere in the free range 01E0h - 01EFh so I can use its extra features like the CAx and CBx lines and maybe the internal timers.
- Enable/clock signals for the various latches and buffers needed for the programmer.
- The original EVM7000 uses a soldered clock crystal. I prefer an oscillator for the very simple reason that it can be placed on a socket and therefore be replaced on the flight with one with another frequency if needed.
- The original EVM7000 uses a TL497 to generate the various programming voltages. But we had many doubts about the schematics in the manual. So Jaak came with the idea to create our own module to generate these voltages.
Schematic and board
The schematic:
The board:
The result:
Spoiler: when writing text to explain the programming voltages part, I ran into an error. See later.
Describing the original and my board, where they differ or are the same.
I will walk you through both the original schematic, found in the manual mentioned above, and my design. Mainly to clarify my design and how I came to it using the original one as base.The reset.
Main parts are resistor R41 (2K2), elco C43 (47uF) and switch SW1. Resistor R39 (22) is used to limit the current drawn from the capacitor when SW1 is pressed.
The output of the resistor/elco combination, called RES, is fed directly to the TMS7000 CPU. RES is fed through resistor R40 (47) to become signal RST and is fed to connector J8 to create the reset signal for the board-under-test. I have no idea why this resistor is needed so that's why I kept it, just in case it does have a function.
The clock circuit.
By using 3-pin jumper P2 one can choose between the external clock coming from the board-under-test or the onboard crystal. I already explained that I will use an oscillator instead of the original crystal.
The MC input.
The MC input is used to tell the CPU whether to go into "processor mode" or into "Single-Chip-mode". In the last mode it uses the internal (EP)ROM and all available ports and bits are available. In "Processor mode" ports are sacrificed to serve as address and data lines and it uses the external (EP)ROM and I/O. 3-pin jumper P3 enables you to make the choice.
The original schematic places resistor R37 between +5V and the jumper. AFAIK there is no known reason to do that. When creating the board this resistor even got in the way so I dropped it. Personal remark: I have seen several schematics where either MC was connected to Ground or to +5V. So why this ressistor?
Another question from my side: what is the use of this jumper? For wat reason would one run the EVM7000 in "Single-Chip-mode"? Fred Jan agreed with me and initialy I decided to remove the jumper. But then the doubt came: what if there was a purpose for it? If I remove it and we find out that it is still needed, then we have a big chalange. If it is not needed, we can solder a wire instead of using a jumper.
The buffers.
The TMS7000 has a multiplexed data/address bus so a latch, IC21, is needed to create the address lines A0..7. The original schematic uses a 74LS373. I use a 74LS573 for the simple reason that in this case the inputs are on one side of the IC and the outputs are on the other side and this gives me room to guide signals between the pins.
IC29, a 74LS245 bi-directional data buffer, takes care of handling the data part.
IC13, a 74LS541 one-directional data buffer instead of the original 74LS244, takes care of buffering the address lines A8..15.
IC1, a 74LS541, takes care of buffering various signals coming from the TMS7000, originally done by a 74LS243 (quite rare nowadays). Having four left over pins, I decided to buffer the pins PB0..3 going from the TMS7000 to connector J8. Port B is output only and IMHO it won't harm the circuit at all if I buffer these four pins as well.
The GALs.
The EVM7000 has a lot of ROM, RAM and I/O onboard. To address everything correctly, it uses various comparators and de-multiplexers like the 74LS688, 74LS154 and 74LS138. And as already explained, I cover all that just using two GALs. The equations:
GAL 1:
Name -- IC33, EVM7000-3 --;
Device G20V8;
Designer Ruud Baltissen;
Date 2025-08-31;
Revision 1.0;
Partno ;
Company ;
Location NL;
Assembly ;
/* Define Logic Operators */
/* AND = & */
/* OR = # */
/* NOT = ! */
/* XOR = $ */
/* Define Input Pins */
pin 1 = PW0; /* swap RAM/ROM, L = original ROM */
pin 2 = LATCH; /* */
pin 3 = ENABLE; /* */
pin 4 = RW; /* */
pin 5 = A9; /* */
pin 6 = A10; /* */
pin 7 = A11; /* */
pin 8 = A12; /* */
pin 9 = A13; /* */
pin 10 = A15; /* */
pin 11 = A14; /* */
/* Define Output Pins */
pin 17 = nLA; /* inverted LATCH */
pin 18 = PHI2; /* */
pin 19 = GAL2; /* active High */
pin 20 = RAM; /* */
pin 21 = ROM; /* */
pin 16 = TMP;
/* Boolean Equations */
nLA = !LATCH;
PHI2 = !ENABLE;
GAL2 = !(!A15 & !A14 & !A13 & !A12 & !A11 & !A10 & !A9 & !ENABLE);
ROM = !GAL2 # (!(A15 & A14 & !PW0) & /* C000 - FFFF normal */
!(!A15 & A14 & PW0) & /* 4000 - 7FFF swapped */
!(A15 & !A14 & A13)); /* A000 - BFFF always */
RAM = !(ROM & GAL2);
GAL 2:
Name -- IC15, EVM7000-3 --; Device G22V10; Designer Ruud Baltissen; Date 2025-08-31; Revision 1.0; Partno ; Company ; Location NL; Assembly ; /* Define Logic Operators */ /* AND = & */ /* OR = # */ /* NOT = ! */ /* XOR = $ */ /* Define Input Pins */ Pin 1 = RW; Pin 2 = A7; Pin 3 = A8; Pin 4 = A6; Pin 5 = A5; Pin 6 = A4; Pin 7 = A3; Pin 8 = A2; Pin 9 = A1; Pin 10 = A0; Pin 11 = GAL2; /* Define Output Pins */ Pin 14 = IC28; /* RPX 01FD RD */ Pin 15 = IC26; /* WPX 01FD WR */ Pin 16 = IC25; /* WPZ 01FB WR */ Pin 17 = IC27; /* WPY 01FC WR */ Pin 18 = RPIO; /* 01FA RD */ Pin 19 = WPIO; /* 01FA WR */ Pin 20 = IC24; /* 01FE WR */ Pin 21 = IC6522; /* 0108-010B */ Pin 22 = IC243; /* 0106 RD */ Pin 23 = IC175; /* 0106 WR */ /* Boolean Equations */ IC243 = !(GAL2 & A8 & !A7 & !A6 & !A5 & !A4 & !A3 & A2 & A1 & !A0 & RW); IC175 = !(GAL2 & A8 & !A7 & !A6 & !A5 & !A4 & !A3 & A2 & A1 & !A0 & !RW); IC6522 = !(GAL2 & A8 & !A7 & !A6 & !A5 & !A4 & A3 & !A2) & !(GAL2 & A8 & A7 & A6 & A5 & A4); IC24 = !(GAL2 & A8 & A7 & A6 & A5 & A4 & A3 & A2 & A1 & !A0 & !RW); RPIO = !(GAL2 & A8 & A7 & A6 & A5 & A4 & A3 & !A2 & A1 & !A0 & RW); WPIO = !(GAL2 & A8 & A7 & A6 & A5 & A4 & A3 & !A2 & A1 & !A0 & !RW); IC28 = !(GAL2 & A8 & A7 & A6 & A5 & A4 & A3 & A2 & !A1 & A0 & RW); IC26 = !(GAL2 & A8 & A7 & A6 & A5 & A4 & A3 & A2 & !A1 & A0 & !RW); IC25 = !(GAL2 & A8 & A7 & A6 & A5 & A4 & A3 & !A2 & A1 & !A0 & !RW); IC27 = !(GAL2 & A8 & A7 & A6 & A5 & A4 & A3 & A2 & !A1 & !A0 & !RW);I use an old DOS program, CUPLPLD from Logic Devices to compile the sources. Never needed another program so I have no idea what other program can be used. But I think WinCUPL would do as well.
The ROM and RAM.
The EVM7000 can be equipped with up to three 2764 EPROMs, 24 KB. To save space, I used a 32 KB 27256 EPROM. GAL IC33 takes care of addressing it.
The EVM7000 can be equipped with either five 2 KB, like the 6116 or 2016, or 8 KB, like the 6264, static RAMs. Jaak's EVM7000 has been equipped with five 6264 equal to 40 KB of SRAM. I decide to use a single 681000 128 KB SRAM but only to use what ever I need up to 64 KB if needed. This is indeed wasting half of the IC but otherwise I have to use two IC's.
The use of GALs not only means I need less ICs but I can program every combination of RAM and ROM in case I don't use this board as EVM7000, for example, 8 KB of ROM and 56 KB of RAM.
Two 74LS138s, U31 and U33, take care of handling the RAM and ROM on the original board. Two interesting things:
- Both IC have to be enabled by the signal VMA. This signal becomes active (L) the moment the first 512 bytes in the 64 KB address range are addressed by the processor. This range has been reserved for the original I/O and the extra I/O like the EPROMmer and serial interface. Activating this signal means disabling the RAM and ROM.
- IC33 has an extra input: RAM/EP, which is line PW0 on the first page. Setting this line causes an EXOR gate (U32) to invert address line A15 to invert. When addressing the range $C000-$FFFF, not the ROM ICs U34 and U44 will be addressed but the RAM ICs U39 and U40. This makes it possible to develop a program, load it into RAM and run as if it is executed from the internal ROM. The circuit that makes this possible on my board is also covered by GAL IC33.
The 6522.
The EVM7000 is meant to emulate a TMS7000 in Single-Chip mode. The onboard processor is working in processor mode at that moment: I/O ports are used as data and address bus and used to generate four control lines. To emulate the lost port C an D, a 6522 is added. The original 6532 is not rare but also not quite common available. The 6522 has two advantages:
- The 6522 has more functies and I see possibilities to use them as well.
- The 6522 is avaiable in a NMOS and CMOS version.
Port C and D are found inside the range $0108-$010B and GAL IC15 takes care of that.
The 6522 and TMS7000 have a different order of data and data-direction registers and that is taken care of by swapping the address lines A0 and A1.
The 6522 has timer registers and some other features of its own and I wanted to make us of them. GAL IC15 should enable us to reserve an address range between $0200 and $0300 to make use of them.
The 6522 needs a PHI2 input. My own idea was using the inverted ENABLE signal as that signal is used by the CMOS version to select the NCS810. But if I want to use the timers, I need a continuous clock signal. ENABLE is only activated when addressing memory or I/O. So an instruction like NOP won't generate an active ENABLE signal and so PHI2 is not continuous and thus the timers won't be reliable. For that reason I implemented the original design using a 74LS109 JK-flipflop as well. For my own curiousity: a 3-pin jumper enables me to choose between two methods.
Port B bits 4..7.
To emulate bits 4..7 of port B, I use the same method as the original design: the combination of a 74LS157 (IC7) and a 74LS243 (IC8). These ICs only need to be addressed at $0106 for a write or a read. GAL IC15 takes care of that.
The serial interface.
I created a compatible serial interface. The difference is mainly the type of ICs used and the way they have been interconnected with each other. I replaced the 74LS374 with a 74LS574 (IC9) and the 74LS244 with a 74LS541 (IC10). I kept the 74LS241 (IC2). I thought about replacing the 1488 and 1489 with MAX232s but at Fred Jan's advice, I dropped all and added two 6-pin connectors to be able to access the TTL in- and outputs directly (4 signals, +5V and Ground).
Bit 2 and 4 of U9/U10 and bit 7 of U10 in the original design are used to handle a cassette recorder for loading and storing data. Data can also be exchanged with other devices using the serial interface. This was the main reasons I decided to drop the cassette interface at first. But Fred Jan had some ideas of still using this interface and he only needed direct access to TTL in-and outputs. And for that only a 4-pin connector was needed: data-in, data-out, motor and Ground.
The EPROMmer part.
The EPROMmer is originally used to read and program certain types of EPROMs and TMS7000 processors. In the beginning I was disappointed that my Elnec LabProg+ was not able to program TMS7000 CPUs. It became weirder when I didn't find another programmer that could. Until Fred Jan told me that a TMS7000 could be programmed like an EPROM. I assume you must select a TMS EPROM and you need a little converter from TMS7000 to EPROM.
I know the EVM7000 can read EPROMs but, at this moment, I have no idea which ones. I know it can read the 2864 EEPROM like a normal 2764 so I assume that it can read my FlashRAM contraptions where a AT29F010 is wired like a 27256. But a TMS7000 CPU can also be read and for this reason I decided to keep the 40-pin socket for the TMS7000 CPU as well.
I placed rectangles with the size of Textool sockets around IC19 and IC20 to make sure that there is enough place reserved to be able to place them.
The EVM7000 doesn't read and program these ROMs and CPUs directly but uses data latches and buffers. A 74LS574 data latch (IC26) and a 74LS541 buffer (IC28) are used to handle the data of the ROM/CPU. A 74LS574 data latch (IC27) creates the address lines A0..7, a 74LS574 data latch (IC26) creates the address lines A8..13 using bits 0..6. Address line A14 is handled by bit 4 of IC24.
Generating the programming voltages was quite a challenge. The main reason: when I started this design I found the schematics were not clear on certain things and maybe even incorrect. I could lend Jaak's EVM7000 and that improved things. But before receiving it, Jaak came with the idea to use the SX1308 step-up DC-DC converter. At Aliexpress I could buy ten complete circuits for less then five Euro so I dropped the idea of using the original schematic around the TL497.
The main idea is simple: use three SX1308 modules and connect their outputs through a diode to pin 1 of the EPROM and pin 36 of CPU part of EPROMmer (= Vpp). Why the diode? Certainly in case of the 21 Volt module the diode prevents that current flows through the collector-base part of the PNP transistor to the rest of the circuit. I don't think that the amount of current will damage anything but better to be sure than sorry.
IMHO the well known 1N4148 should do fine.
The original idea was using no diodes and connecting one the transistors directly to +5 Volt. But using a diode means a voltage drop of at least 0.7 Volt. So I decide to add another module for the 5V part. I always can start with just a wire instead of a module. Does that work, nothing is lost.
As an extra I added resistor R3 to pull Vpp to 5 Volt in case none of the modules is selected. 1K is IMHO a save value: enough to pull the Vpp pins High and enough to limit the current towards the +5V line the moment Vpp = 21V.
A 74LS138 3-to-8-demultiplexer takes care of selecting the correct transistor. Problem: Jaak and I have opposite ideas about when the signals PZ6 and PZ7 of IC26 activate the correct programming voltage. My oppinion: PZ6 activates 12V when PZ6 is 0V, PZ7 activates the 21V when 0V. Jaak thinks they do when they are +5V. I'm quite sure I'm right but decided to build in a solution just in case I'm wrong: three jumpers, JP4, JP5 and JP6 select the correct outputs.
PZ6 has been connected to input A of the 138, PZ7 to input B and input C to 0V. According my theory output Y1 should activate 12v, output Y2 21V, output Y3, both signals in rest, 5V and output Y0, not possible IMHO, unconnected. According to Jaak that would be Y2, Y1, Y0 and Y3. The table below should explain things better (I hope):
| Ruud | Jaak | Reality | |||
|---|---|---|---|---|---|
| PZ6 | PZ7 | | | 1-2 | 2-3 | |
| 0 | 0 | | | X | 5V | 5V |
| 0 | 1 | | | 12V | 21V | 12V |
| 1 | 0 | | | 21V | 12V | 21V |
| 1 | 1 | | | 5V | X | X |
I added the "Reality" column later after I was able to check the real EVM7000.For more on handling the programming voltages, see next part.
Extra bits.
A 74LS273 (IC24) creates some extra needed bits. A 273 is chosen because it has a reset function.
- Bit 0 takes care of the ROM/RAM swap function. The reset function of the 273 makes sure that after a power-up or an hard reset the onboard TMS7000 processor sees ROM instead of RAM and therefore can start up. Not in the original design: I added a LED (idea: Fred Jan) to signal that this feature has been activated.
- Bit 1 lights up the LED marked DATA and pulls Vpp to 0V. To avoid any conflict with the SC1308 modules, this bit has been connected to input G2A of the 138. The moment it is set to pull Vpp low, it disables the 138 and mo harm can be done by conflicting voltages.
- Bit 2 handles the OE input of the (EP)ROM to be read/programmed and input B2 of the CPU to be read/programmed.
- Bit 3 is not used AFAIK so I made it to lights up (or not) the LED marked EXTRA. The original software cannot use it but it can be used as a test signal when testing some own software.
- Bit 4 handles address line A14 of the (EP)ROM to be read/programmed and input A7 of the CPU to be read/programmed.
- Bit 5 lights up the LED marked PGM. AFAIK this bit is only set when something needs to be programmed and therefoe I connected it to the G1 input of the 138. The reality check profed me right.
- Bit 6 handles the reset input of the CPU to be read or programmed.
- Bit 7 handles the input A4 of the CPU to be read or programmed.
Power supply.
The original design needs +5V, +12V, -12V and Ground. So the idea rose to use an AT power supply. But after not needing the 1488 and 1489 level converters any more, I decided to reduce the power supply to a simple +5V and Ground only one. But being a fan of the AT power supply, I replaced the original power connectors with a simple floppy drive power connector. Fred Jan, not being a fan of the AT PS, asked for and got a more conventional PS as well that includes the well known 7805 voltage converter.
Of course you can only use one type at the time so I provided jumper JP7 so one can solder both types and still keeping the 7805 when using the floppy power by disconnecting its output towards the +5V lines by removing jumping JP7.
Not being sure if 5 Volt is enough to create 21 Volt I decided to give the user the choice between 5V or 12V as input voltages for SX12 and SC21. Of course this will only work if an AT PS is used.
The reality check
When I was able to check the behaviour of Jaak's EVM7000, I ran int a weird surprise: after a power-up the EVM7000 starts up with both PZ6 and PZ7 Low! PW5 = Low as well and that de-activates TL497. Vpp = 5V.But here I started to realise that I made an error: PW5 is only active (= High) when a programming voltage i.e. 21V or 12V is needed. This on its turn means that Y0 and Y3 never cannot become Low because PW5 will prevent that.
Then another completely unexpected behaviour. One can command the EVM7000 to set the programming voltage to either 12V or 21V. PW5, PZ6 and PZ7 behaved as I expected. But after a reset using the switch, PW5 became High but PZ6 and PZ7 didn't change their state!
My first idea was to drop the third SX1308, SX5, and to rely on R3 to keep Vpp to +5V. But then the idea struck to use PW5 itself. Just connect pin 6 of the 74LS138 (= PW5) to pin 2 of JP6. And IMHO R3 is not needed anymore.
The result, just the changed parts:
The future
We want to use the EVM7000 in more ways than it is designed for. But that means changing the system ROM. And on its turn that means to disassemble the original ROM first.EVM7000-1 and EVN7000-2
You may have wondered why the above board has the extension "3" like it is the third version. Because it is. I created the first version purely based om the original schematics, including the 1489 and 1488 converters for RS232 but without the programming voltages part. Then I created version 2, the minimal version, no programmer part and only TTL-RS232. But when Jaak came with the SX1308 module to solve the programming voltage problem, I decided to create a full version again but still with TTL-RS232 only.If interested, the schematics and boards of the previous two are available on request. But a warning: things have changed or improved in the mean time so you have to check the designs for yourself first.
You can email me here.